Graphics processing systems are used to process graphics data. For example, an application running on a computing system may need to render an image of a three dimensional (3D) scene for display to a user. The application can send graphics data, typically in the form of a sequence of primitives to a graphics processing system which can render the image of the scene in accordance with the primitives.
FIG. 1 shows some basic elements of a graphics processing system 100 which may be used to render an image of a 3D scene. The graphics processing system 100 comprises a graphics processing unit (GPU) 102 and two portions of memory 1041 and 1042. It is noted that the two portions of memory 1041 and 1042 may, or may not, be parts of the same physical memory, and both memories 1041 and 1042 may be situated “off-chip”, i.e. not on the same chip as the GPU 102. Communication between the memories (1041 and 1042) and the GPU 102 may take place over a communications bus in the system 100.
In the example shown in FIG. 1, the graphics processing system 100 is a tile-based deferred rendering system, meaning that the rendering space of the system 100 is divided into a plurality of tiles and that hidden surface removal is performed on a primitive fragment prior to performing texturing and/or shading on the primitive fragment in order to render the scene. However, in other examples, graphics processing systems may be non tile-based and/or not deferred rendering systems. The GPU 102 comprises a pre-processing module 106, a tiling unit 108 and a rasterization module 110, wherein the rasterization module 110 comprises a hidden surface removal (HSR) module 112 and a texturing/shading module 114. The graphics processing system 100 is arranged such that a sequence of primitives provided by an application is received at the pre-processing module 106. The pre-processing module 106 performs functions such as geometry processing including clipping and culling to remove primitives which do not fall into a visible view. The pre-processing module 106 may also project the primitives into screen-space. The pre-processing module 106 may also put the received primitives into primitive blocks.
The primitives (e.g. in primitive blocks) which are output from the pre-processing module 106 are passed to the tiling unit 108 which determines which primitives are present within each of the tiles of the rendering space of the graphics processing system 100. The tiling unit 108 assigns primitives to tiles of the rendering space by creating display lists for the tiles, wherein the display list for a tile includes indications of primitives (i.e. primitive IDs) which are present within the tile. The display lists and the primitives (e.g. in primitive blocks) are outputted from the tiling unit 108 and stored in the memory 1041. The rasterization block 110 fetches the display list for a tile and the primitives relevant to that tile from the memory 1041 and the HSR module 112 performs hidden surface removal to thereby remove fragments of primitives which are hidden in the scene. The remaining fragments are passed to the texturing/shading module 114 which performs texturing and/or shading on the fragments to determine pixel colour values of a rendered image which can be passed to the memory 1042 for storage in a frame buffer. The rasterization block 110 processes primitives in each of the tiles and when the whole image has been rendered and stored in the memory 1042, the image can be outputted from the graphics processing system 100 and, for example, displayed on a display.
Increasing the number of primitives which are present within a tile will typically increase the number of primitive IDs included in the display list for the tile. This means that the amount of data included in the display list is increased, thereby using a greater amount of the memory 1041 for storing the display list and increasing the amount of data that is passed between the tiling unit 108 and the memory 1041. Furthermore, the display list is read by the HSR module 112 from the memory 1041 and the primitives which are indicated in the display list are fetched by the HSR module 112 from the memory 1041. Communication between the GPU 102 and the memory 1041 is a relatively slow process (compared to processes performed on the same chip as the GPU 102), therefore it may be beneficial to reduce the amount of data that the GPU 102 writes to the memory 1041 and/or reads from the memory 1041.